Reducing the number of semiconductor switches in power electronic converters has been a continuing effort in recent years as a measure to enhance the system reliability and to decrease its size, weight, and component cost. For these reasons, a new reduced switch count three-phase ac/ac converter is being proposed. Being realized by only six active switches and anti-parallel diodes, the proposed converter topology employs the minimum number of semiconductor devices amongst the converters of its kind. It also features unity power factor, regenerative operation, pulse width modulated output voltage, and sinusoidal input current. The reduced number of switches results in a simplified associated gate drive circuit as well as cooling system which, in turn, may cut the overall manufacture cost, especially in low voltage and low power applications. The modulation scheme of the new converter is developed, and a control algorithm is proposed for the converter’s rectifier side. Moreover, an analysis is performed on the dc link capacitor sizing for the purposes of reducing dc link voltage ripple, balancing the input current, and lowering its THD. The simulation and experimental results corroborate the transient and steady state performance of the proposed converter topology.

This paper considers the details of design and implementation of a three-phase to three-phase matrix converter rated at an input voltage of 380V line and an output current of 7A. The designed converter is a generalized converter and can be safely operates with maximum three inputs and three outputs regardless of the form of the input and output waveforms. In this paper, first the voltage and current ratings of power semiconductor devices are calculated for the prototype converter. Then, the gate drive circuit of the bi-directional switches is designed. Also, a voltage clamp circuit is used to protect the devices against severe over-voltages. A simple R-C snubber circuit has been used to limit the device voltage to an appropriate level. Also, the snubber circuit will be analyzed completely. Finally, the simulation results by PSC AD software and also the practical implementation results will be given.

In this paper, a new topology for Interline Dynamic Voltage Restorer (IDVR) is proposed. This topology contains two direct three-phase converters which have been connected together by a common fictitious dc-link. According to the kind of the disturbances, both of the converters can be employed as a rectifier or inverter. The converters receive the required compensation energy from the gird through the direct link which is provided by the dual-proposed switches. Due to the lack of the huge storage elements, the practical prototype of the proposed topology is more economical in comparison with the traditional structure. Moreover, compensating for long time duration is possible due to the unlimited eternal energy which is provided from the grids. The low volume, cost and weight are the additional features of the proposed topology in comparison with traditional types. This topology is capable to compensate both of the balanced and unbalanced disturbances. Furthermore, restoring the deep sags and power outages will be possible with the support from the other grid. Unlike the conventional topologies, the capability of compensation is independent from the power flow and the power factor of each grid. The performance of the proposed IDVR topology is validated by computer simulation with PSCAD/EMTDC software.

Residue Number System (RNS) is a carry-free and non-weighed integer system. In this paper an improved three-moduli set {2n-1, 2n+1,2pn-1} in reverse converter based on CRT algorithm is proposed. CRT algorithm can perform a better delay and hardware implementation in modules via other algorithms. This moduli is based on p that covers a wide range on modules and supports the whole range of its modules in dynamic range. With growth in moduli, many types of modules have been proposed. By using dynamic range we can solve many problems in Residue Number System (RNS) by just one three moduli. In proposed moduli set of this paper in Residue Number System (RNS), the internal circuit is improved and thus, complexity of circuit, energy consumption and power consumption in our proposed design is improved. These improvements are shown in evaluation in terms of CSA adders, CPA adders and delay.

In this paper, the average power losses in a nonsynchronous boost converter are carefully estimated and calculated at three continuous, discontinuous and forced continuous conductive mode and average power losses of the H-bridge single phase inverter is estimated by sinusoidal pulse width modulation method. Then by a general approach, thermal model and Heat transfer equations are discussed in a natural convection and forced convection with parallel fins and these two methods are compared together. In order to increase thermal performance, thermal model change to electrical equivalent circuit and heat sink to air thermal resistance optimized, all of geometric parameters determined by a constrained particle swarm evolutionary algorithm among several designs. In order to optimize design of cooling and increase reliability of the components, the suitable arrangement examined by a mathematical and innovative approach. In this method which has its own characteristics in terms of accuracy, compatibility and stability, at first, temperature distributed on heat sink baseplate and then decrease hot spots temperature by optimization algorithm above mentioned. In forced convection compared to free convection cooling system, converter temperature and efficiency decrease respectively 46 Celsius degrees and 0. 37 percent and forced convection cooling system volume tripled than free convection.

This paper describes the development of a new generation of single phase rectifier which is used to power telecommunications equipment. A rectifier is designed in such a manner to meets with all the requirements of the telecommunications industry. A number of common single phase topologies exist that could be realized as telecommunication power supplies, however, they do not completely satisfy all the industry requirements. This paper reviews recent progress in topology, control and design aspects in single phase PFC techniques. Different switching rectifier topologies are presented for various applications. Merits and limitations of these techniques are discussed. A detailed report of an investigation in the power converter system performance is also provided.

In this paper, the phase-shifted pulse width modulation (PWM) method is proposed in an asymmetric three-level neutral point diode clamped (NPC) converter for switched reluctance motor (SRM) drive. In order to control this converter, the level-shifted PWM method is used usually. The proposed modulation method is compared with the level-shifted PWM method on the basis of switching frequency and current ripple. The switching frequency is independent of the load in the proposed method, while current ripple in two cases is almost equal. The switching frequency changes in a nonlinear manner by changing the load in the level-shifted PWM method. Therefore, the switches stress will be increased by the load variation. The effectiveness of the proposed method is verified by theoretical, simulation and comparison results.